Preparing Gerber Files for Smooth PCB Manufacturing
Manufacturing starts with data you can explain. A complete schematic and a pretty layout screenshot do not get boards built—fabricators need a coherent set of Gerbers, drills, drawings, and notes that answer the same questions every shop asks: which layer is which, what the stackup is, where the drills belong, and what is intentional versus leftover CAD noise.
Most quote delays are not capability problems. They are package problems: renamed layers, missing drill files, impedance targets trapped in a private spreadsheet, or panel notes that contradict the single-board outline. This guide walks through the fabrication package MOZPCB expects on a clean RFQ—so engineering review spends time on real DFM risk, not reconstructing your export settings.
Export a complete layer set—and name it so humans can read it
At minimum, include copper layers for every plane and signal layer, solder mask top and bottom, silkscreen top and bottom when used, and a paste layer if you will assemble. Add a mechanical or outline layer that defines board edge, slots, cutouts, and any scored features. If your CAD tool exports a separate board-outline file, keep it; do not bury the outline only as a line on a copper layer that a CAM operator might treat as artwork.
Layer naming should survive handoff. Prefer clear labels such as Top_Copper, L2_GND, L3_Signal, Bottom_Copper, Top_Mask, Bottom_Silk over cryptic job numbers that only your project folder understands. Include a short layer map in the fab notes or a README: “L1 top signal, L2 ground, L3 power, L4 bottom signal.” When the map and the file names disagree, shops stop and ask—and your clock stops with them.
Drill data must match the stackup and the copper
Send NC drill files that cover plated and non-plated holes, plus a drill report or tool list that shows diameters and whether each tool is PTH or NPTH. Slot and cutout geometry belongs in a mechanical layer or a dedicated rout file—do not assume a circular drill can stand in for a slot. If you use blind or buried vias, document which layers each drill spans; unmarked blind drills are one of the fastest ways to get a wrong quote or a wrong panel.
Check drill-to-copper parity before you zip the package. Every plated hole needs a pad or antipad that matches the intent of the net. Orphan drills, unplated holes drawn as plated, and via pads smaller than the fabricator’s annular-ring minimum are classic DFM hits. Catching them in CAD is cheaper than catching them after the first article.
Apertures, units, and format: remove ambiguity
Modern RS-274X Gerbers embed apertures; older RS-274D jobs still need an aperture list. Confirm your export uses embedded apertures and a single unit system (inches or millimeters) across Gerbers and drills. Mixed units are still a real failure mode when one engineer exports metric copper and another exports imperial drills.
Also confirm polarity and mirror settings. Top and bottom layers should not require the CAM operator to guess whether a layer was mirrored on export. If your toolchain has a “Gerber job” or ODB++ option and your fabricator accepts it, a self-describing job can reduce naming friction—but only if you still include a human-readable stackup note. Fancy formats do not replace clear intent.
Stackup, impedance, and finish notes belong in the first RFQ
Attach a stackup drawing or table: layer order, dielectric targets, copper weights, and overall thickness. When impedance matters, add target values, tolerances, reference planes, and which traces are controlled—single-ended and differential. Fabricators cannot invent a coupon plan from a vague “50 ohm somewhere on L1.”
Call out surface finish, soldermask color, silkscreen color, IPC class expectations if any, and special processes such as via-in-pad, edge plating, or controlled depth routing. If something is still undecided, say so explicitly. “Finish TBD between ENIG and OSP; prefer ENIG if schedule allows” is actionable. Silence is not.
Panelization, assembly handoff, and a pre-send checklist
If you panelize in-house, include both single-board and panel data, or clearly state that the fabricator should propose array, rail, and depanelization method. Mismatched outlines—one board in Gerbers, another in the mechanical PDF—create scrap risk. For assembly-bound boards, keep paste layers, polarity marks, and fiducials consistent with the centroid you will send later.
Before you hit send: open the Gerbers in a viewer and flip through every layer; confirm drill alignment on copper; confirm outline continuity; confirm the zip contains the layer map, stackup, and fab notes; and name the archive with part number and revision. At MOZPCB, packages that arrive this way move through engineering review faster because the open questions are technical—not archaeological. If you want us to start from an incomplete set, say what is missing; resolving gaps in review still beats discovering them after tooling.
Frequently asked questions
What files does a PCB fabricator need to quote a board?
Should I send Gerber X2, ODB++, or IPC-2581 instead of classic Gerbers?
Do I need to panelize my design before sending it?
What is the most common mistake in Gerber packages?
How should I document controlled impedance in the fabrication package?
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