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PCB Design Guide 2026/07/15 5 min read

DFM Checklist Before PCB Production Release

Design for manufacturability is not a single review meeting—it is a set of release gates you can run before Gerbers go to tooling. Catching annular-ring risk, mask slivers, or missing test access at release saves weeks compared to discovering them on first article.

Use this checklist as a self-review before RFQ or PO. At MOZPCB, we still run our own review—but packages that arrive pre-checked move through quoting faster.

Fabrication data completeness

Confirm Gerbers, drills, layer map, outline, and fab notes agree. Verify units and polarity across exports. Include stackup, finish, mask color, and impedance table if applicable.

Cross-check the quiet contradictions: the board outline in the Gerbers versus the mechanical PDF, the layer count in the stackup drawing versus the actual copper files, and the finish named in the fab notes versus the one quoted. Each mismatch is a stop-and-ask cycle at CAM—or worse, a silent assumption.

Mark via-in-pad, castellations, edge plating, and controlled-depth features explicitly—do not rely on CAM to infer intent from copper art alone.

DFM geometry checks

Review annular rings on vias and through-holes against drill size and copper weight. Scan for mask slivers and insufficient dams on fine pitch. Check copper balance across layers for warp risk.

Add the second-tier checks that surface at volume: drill aspect ratio against board thickness (8:1 is comfortable almost anywhere; 10:1 and beyond needs confirmation), acid traps at acute trace-to-pad angles, starved thermal reliefs on plane-connected pads that will fight wave soldering, and teardrops where thin traces meet pads on boards that will see registration stress.

Confirm silkscreen does not cover pads and that fiducials exist for assembly if SMT is in scope.

Typical starting guidelines—confirm against your fabricator’s capability table
Check Typical guideline Risk when violated
Annular ring (via) ≥ 0.05 mm per side after drill toleranceBreakout, plating reliability
Solder mask dam ≥ 0.1 mm between fine-pitch padsSliver flaking, bridging
Drill aspect ratio ≤ 8:1 comfortable, ≤ 10:1 confirmPlating voids in barrel
Trace/space (1 oz outer) ≥ 0.1 mm / 0.1 mm standardYield loss, cost adder below
Silkscreen to pad ≥ 0.15 mm clearanceInk on pads, solderability
Copper balance Even distribution per layer pairBow and twist at lamination

Assembly and test readiness

BOM matches schematic revision; DNP lines are marked. Centroid polarity matches assembly drawing. MSL parts are identified. Test points exist for ICT or flying probe if required—or document why they do not.

Panel-level readiness belongs here too: fiducials on the panel rails as well as the board, tooling holes where the line needs them, and a depanelization method (V-score, tab-route, or both) that matches how close components sit to the board edge. Components overhanging a V-score line are a classic assembly-stage discovery that a release check catches for free.

If turnkey sourcing is in scope, alternates and AVL rules are attached. If consigned, kit list and date-code constraints are stated.

Release discipline

Archive the exact zip sent to the fabricator with a revision ID. Note open TBDs explicitly—finish choice, impedance tolerance, panelization owner—so they become decisions in review, not surprises in CAM.

When changes arrive after release—an ECO, a substituted part, a mask color decision—rev the package and resend it whole, never as a loose file in an email thread. Fabricators build what is in the package; a drill file from Tuesday and fab notes from Friday is how two “correct” halves make one wrong board.

Treat DFM as part of design release, not as a hurdle after PO. The goal is a traveler both sides can build without reinterpretation.

Frequently asked questions

When should I run a DFM check—before or after the RFQ?
Before. A self-checked package gets a faster, firmer quote because the fabricator’s review confirms rather than discovers. The fabricator still runs their own DFM against their specific process windows—the two reviews are complementary, not redundant.
What DFM issues most often force a re-spin?
Annular-ring violations discovered after tooling, unmarked via-in-pad under BGAs, impedance mismatches from undocumented stackup assumptions, and missing test access on boards that turn out to need ICT. All four are cheap to catch at release and expensive at first article.
Do free CAD DFM tools replace a fabricator review?
No—but they are worth running. Built-in DRC/DFM checks catch geometry violations against generic rules; a fabricator review checks against the actual process that will build your board, including material availability, panel strategy, and finish interactions. Use tools to clean the package, review to close it.
What is copper balance and why does it matter?
It is the distribution of copper across and within layers. Heavily uneven copper—dense pours on one side, sparse routing on the other—creates asymmetric stress during lamination and reflow, causing bow and twist. Warped panels misprint paste and misplace parts, so imbalance discovered late becomes an assembly problem, not just a fab one.
Should test points be added even on prototypes?
Decide deliberately per build. Flying probe needs no fixtures and handles most prototype checks without dedicated test points, but net access still matters—a board where critical nets are buried with no probe access limits even flying probe. If production will use ICT, placing test pads early costs little and avoids relayout later.

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